SmartFusion – ADC Peek Registers
ID: FQ1040
Devices: SmartFusion
Keywords: SmartFusion, ADC, Peek Registers, ADC FIFO
What are ADC Peek Registers? Where are they located?

ADC Peek Register is a read-only register that returns the same data as read by reading the ADC_FIFO_DATA register. It just does not increment the read-pointer after the read that would happen when reading from the ADC_FIFO_DATA register.

Lets say, this FIFO output flows to 3 locations simultaneously: the Peek Register, the ADC register that is accessible from APB master, and the PPE. If the APB master reads the peek register address, then it gets the data but doesn't trigger a Pop on the ADC FIFO. If the APB master reads the ADC register address then it also gets the data, but in addition Pops the address as well.

The peek register is just another register in the ACE; it is not the SSE RAM. The registers corresponding to different Analog blocks are located closer to the analog blocks. These are interfaced with ACE using a Bus called configuration bus (ACB). So these Registers may not be physically present inside ACE. However, functionally they belong to SSE.

Background: For each of the ADCs in SmartFusion in addition to the 16(Width) x 4 (Depth) FIFO, which is read by PPE in a round-robin fashion, there is a dedicated PEEK register which can be used to access ADC result without losing data for PPE and/or APB3 master.
The address locations and register names are given below:
The bit decode for these registers are

Bits[31:16] 	Reserved
Bits[15:12] 	ADC Channel Number
Bits[11:0] 	ADC Result

Address Register Name Type Width Reset Value Description
0x40021500 ADC0_FIFO_DATA_PEEK R 16 0 16-bit result FIFO for ADC0
0x40021514 ADC1_FIFO_DATA_PEEK R 16 0 16-bit result FIFO for ADC1
0x40021528 ADC2_FIFO_DATA_PEEK R 16 0 16-bit result FIFO for ADC2

Last Modified: 6/5/2013
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